Senior FPGA Engineer

Job description

We are seeking a highly skilled FPGA Engineer to design, implement, verify, and integrate high-performance digital logic for advanced communication and processing systems as part of Impulse’s next generation of space vehicles. The ideal candidate will have strong HDL development experience, practical understanding of high-speed digital architectures, and hands-on lab debugging skills. Develop, implement, and optimize FPGA designs using VHDL or Verilog Perform high-speed digital integration, including multi-clock domain interfaces, timing closure, and advanced clock-constraint management Architect FPGA data paths with an emphasis on throughput, parallelism, and resource efficiency Implement and integrate AXI4/AXI-Stream interfaces and related on-chip bus architectures Design and manage FPGA clocking using PLL and MMCM primitives Use Xilinx and Intel/Altera FPGA tools for synthesis, place-and-route, constraint definition, and timing analysis Build self-checking testbenches for functional verification and regression coverage Debug FPGA designs in the lab using logic analyzers, oscilloscopes, and FPGA debug tools such as Chipscope or SignalTap Collaborate with DSP, systems, and software teams to define hardware architectures and support algorithm implementation Bachelor's degree in Electrical Engineering, Optical Engineering, or related technical discipline. Minimum 5+ years of experience in the optical communications field Expertise in HDL development using VHDL or Verilog Experience with high-speed digital design, timing closure, and parallel data path architectures Familiarity with AXI4/AXI-Stream interface standards Proficiency with Xilinx (Vivado) and Intel/Altera (Quartus) FPGA toolchains Experience with FPGA clocking resources (PLL, MMCM) and multi-clock domain integration Strong understanding of digital logic, state machines, pipelining, and data-path design Ability to create and maintain self-checking testbenches for module-level and system-level verification Hands-on experience with lab debugging and FPGA hardware bring-up